CST334 - Week 4

 

CST334 – Operating Systems - Week 4

What an exciting week to learn about paging. This is a great topic to dive into space management for memory virtualization by paging. The concept divides memory into equal, fixed spaces called pages and translates the virtual address through a stored mechanism for translation. A page table is the data structure where address translation data is stored for mapping virtual page numbers to physical frame numbers (PFN). The page table comes in a simple form of a linear page table as an array. The different types of bits are the valid bits to validate the address translation and protection bits for read, write, and execution permissions. There's also a presence bit that determines the location of the page (physical memory or disk), a dirty bit that indicates if a page has been modified, and a reference bit to track access to pages.

For faster paging, a hardware cache is used first to look up the value for address translation. The translation-lookaside buffer, or TLB, is used in the MMU to reference virtual memory without needing access to the page table. A TLB hit occurs when a relevant translation is held in the TLB, resulting in a successful translation. A TLB miss means that the CPU could not find the translation in the TLB, so the hardware accesses the page table on a valid bit. TLB misses are handled by CISC (hardware-managed TLBs) or RISC (software-managed TLB). RISC utilizes a trap handler with a return different from a trap caused by a system call. The return from a TLB miss-handling trap resumes with the same instructions that caused the trap.

The replacement policy of the OS is designed to evict pages to allow fresh and most-used ones to have room. Since any cache misses cost access to the slower disk, choosing a smart policy is crucial to lower slow performance. Three types of cache misses are compulsory (when the cache is empty), capacity (when the cache does not have space), and conflict (due to restrictions on item placement in hardware cache). Optimal, FIFO, LRU, LFU algorithms, and Random are examples of replacement policies.